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SK Hynix predicts: By 2030, the scale of AI infrastructure performance will increase by about 20 times

IT Home, October 14 – According to Yonhap News, SK Hynix’s Chief Development Officer Ahn Hyun delivered a keynote speech at the “28th Korea Semiconductor Expo” (SEDEX 2026) held at COEX in Gangnam District, Seoul today.…

Thank you to the netizen from IT Home Huanan Wu Yanzu for sharing the clue!

IT Home On October 14, according to Yonhap News, Ahn Hyun, the chief development manager of SK Hynix, gave a keynote speech at the “28th Korea Semiconductor Expo” (SEDEX 2026) held at COEX in Gangnam District, Seoul. He predicted that the scale of AI infrastructure performance will increase by about 20 times by 2030.

An Xuan pointed out that the current AI reasoning market is expanding rapidly in three dimensions: an increase in task complexity, a surge in the amount of information processed at one time (context length), and a boom in the number of reasoning requests. These factors are intertwined, driving a rapid growth in the demand for AI computing infrastructure.

With the rapid increase in AI inference demands, memory, which handles massive data storage and migration tasks, becomes increasingly important. In particular, the capacity of the “Key-Value Cache” used to store and reuse previous processing information continues to expand, forcing systems to distribute data across various media such as high-bandwidth memory HBM, DRAM, and SSDs. Analysis shows that the data migration involved in this process is becoming a new bottleneck that restricts performance improvement and increases system energy consumption.

Regarding this, An Xuan made this prediction: that the performance scale of artificial intelligence infrastructure will increase by about 20 times by 2030.

An Xuan emphasized that the industry cannot merely focus on improving the performance of a single memory chip, but urgently needs to adopt a global solution to optimize the entire memory hierarchy.

For this purpose, SK Hynix is fully committed to advancing next-generation storage technologies such as 3D stacked DRAM and high-bandwidth flash HBF, while continuously optimizing the performance of its existing HBM.

  • 3D stacked DRAM: By directly stacking DRAM on logical chips such as GPUs and NPUs, transmission performance is significantly improved while energy consumption is greatly reduced.

  • High Bandwidth Flash HBF: It introduces the mature silicon via stacked technology and high-speed I/O interface techniques applied to HBM into NAND flash, aiming to create a new storage layer between HBM and DRAM.

According to reports from IT Home, SK Hynix aims to achieve a bandwidth of HBF around 50% of that of similar HBM products, while also increasing capacity by approximately 10 times.

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