IT Home October 18 news: According to Korean media The Elec, Micron is advancing the development of a dedicated memory chip for Physical AI — Edge Inference Memory (EIM).
On October 16, at the specialty forum "Semiconductors Driving Humanoid Robots" of the Korea Semiconductor Exhibition (SEDEX 2026) held at COEX in Gangnam, Seoul, Micron executive (managing director) Lee Cheol (transliterated) said: "Physical AI markets such as autonomous driving, humanoid robots, augmented reality (AR), and virtual reality (VR) are rising rapidly. We are communicating closely with core customers to jointly advance product development suited to this emerging market."
It is reported thatEIM can process the data required for AI inference at high speed, and its architecture vertically stacks low-power memory (LPDDR) on top of a logic chip. This is a different concept from Processing-in-Memory (PIM), which performs computation inside the memory. What the two have in common is that both are deployed around the main AI chip to improve data processing efficiency; however, PIM integrates computing units inside the memory, while EIM's specific computing architecture has not yet been disclosed.
EIM sits between the AI processor and memory,mainly used to reduce data processing latency and increase system bandwidth. Micron has not yet disclosed specific target performance metrics,but is advancing technical development to integrate EIM into an LPDDR6 solution. Industry estimates put its mass production in the second half of 2028.
IT Home has learned that, unlike traditional industrial robots that can only repeatedly execute fixed programs, humanoid robots are proactive, able to perceive their surroundings and make autonomous decisions, requiring the collection and precise control of diverse information such as vision, hearing, weight perception, and tactile texture.
At present, humanoid robots mainly use low-power memory such as LPDDR rather than high bandwidth memory (HBM). Unlike data centers that rely heavily on HBM, battery-powered robots have stricter requirements on energy efficiency. However, as the parameter scale of AI models continues to grow, traditional LPDDR alone is gradually becoming unable to provide sufficient memory bandwidth.
Micron predicts that humanoid robots in the future will ultimately also move toward adopting HBM. Lee Cheol pointed out: "The AI models currently used by robots mostly have around 1 billion to 2 billion (1B~2B) parameters, so the demand for memory bandwidth is still limited; but with the introduction of more powerful vision-language models (VLM), LPDDR alone will no longer suffice, and an evolution toward HBM architecture is inevitable."
Meanwhile, demand for memory capacity is also surging in tandem. Micron expects that future high-performance humanoid robots will need about 200GB of DRAM and 4TB of storage. For comparison, current mainstream service robots are typically configured with only 12GB of DRAM and 256GB of storage.
Lee Cheol said: "Existing DRAM and storage architectures can no longer meet the demanding requirements of the Physical AI market. We are engaged in deep collaboration with robot manufacturers, chip solution providers, and hyperscale cloud service providers starting from the early system design stage of the chips."