量子位

Fully self-developed across the stack! Domestic high-end interconnect chips are set!

Six years in the making, 800,000 units shipped

Image source · 量子位

By Yunzhong, from Ao Fei Si

Quantum Bit | Official account QbitAI

The grand narrative of the computing power industry is in full swing, and the top players' eyes are already on the most hidden, critical seat at the table.

Recently, a domestic interconnect chip company known as "China's Broadcom" quickly burst into the mainstream view of the computing power market. At a single launch event, a full12 mass-produced chipswere unveiled, along with three new high-performance interconnect chips and a complete suite of core IP.

This isZhongxing Wei. Low-key for a full 6 years, its debut nearly flipped the table of the international giants.

What shook the industry was not only the full-scenario self-developed product lineup spanning "general-purpose computing interconnect + intelligent computing interconnect." On-site, from software and hardware ecosystem partners such as operating systems, cloud, and complete systems, to customers in industries such as telecom operators and finance, everyone was showing support for this high-performance interconnect company.

Looking at the results: including network interface cards, storage cards, and Switch chips, Zhongxing Wei's full-stack products have shipped a total of800,000 units。

Exploding onto the scene right at debut is truly rare in this era when "even fine wine fears a deep alley." Especially since the domestic high-performance interconnect market has long been dominated by international giants, and replacement at the interconnect chip layer is extremely complex—why are the leading computing power players banding together to choose them?

Loosening the hand that grips the throat

In recent years, with the rapid advance of digital and intelligent applications, the growth rate of demand in the computing power market is obvious to all. Among this, internet giants have continued to increase capital expenditure, hyperscale computing infrastructure projects have landed one after another, and thecomputing power racehas become the core main line of the AI era.

However, in large-scale computing clusters,unlocking computing power efficiencyis an interlocking proposition.

Improving the capability of a single card and stacking more cards in a cluster are conventional means of raising computing power performance parameters. But to truly unleash the overall efficiency of a cluster,interconnect chipsare the "highways" that connect computing power infrastructure.

"Computing power infrastructure construction is a systems engineering effort."

Guo Erhui, General Manager of Wuxi Zhongxing Wei System Technology Co., Ltd., believes, "Computing power is by no means a simple pile of equipment, but an organic whole of deeply coupled subsystems—computing, networking, storage, power supply, cooling, scheduling, and more。”

He pointed out that to fully unleash computing power efficiency, systematic engineering methods must be used for overall planning and coordinated optimization; otherwise, any shortcoming will be magnified into a bottleneck for the whole.

Clearly, as domestic GPUs, CPUs, and storage chips rise in droves and cluster scales expand to the level of 10,000 or 100,000 cards, interconnect chips have become the weak link in cluster system efficiency—another "black hand" gripping the throat of the computing power industry.

Specifically, in large-scale computing clusters, multiple compute nodes need to frequently exchange data such as gradients and model parameters, and these communication operations are endlessly amplifying the network bandwidth bottleneck, restricting the effective computing power of the cluster.

The value of interconnect chips is amplified by cluster scale. Guo Erhui offered a formula:Cluster effective computing power = single-node computing power × scale × interconnect efficiency。

This also means that if computing power builders focus only on individual cards and card counts, the return on investment will show a clear diminishing marginal effect. Filling in the interconnect短板 shortcoming is currently the most urgent and most effective step.

So here comes the question: in the past, the global high-performance interconnect market was dominated mainly by international giants such as Broadcom, and domestic brands in this field were far from mature in terms of technology and product coverage.

The former offers a complete product line and strong performance, but faces major supply chain uncertainties; the latter started late, with insufficient chip performance and product coverage, but has an advantage in domestic supply assurance. This "choose one of two" dilemma now truly confronts domestic computing power players.

Building a Stable High-End Interconnect Chip Supply Chain

Some time ago, the Ministry of Industry and Information Technology and the National Development and Reform Commission jointly issued the "Electronic Information Manufacturing Industry 14th-15th Five-Year Development Plan" (referred to as the "Plan"). Among its contents, high-speed interconnect was explicitly listed as one of the key technical research directions for "building an advanced computing ecosystem."

The Plan states that it is necessary to "accelerate innovative breakthroughs in advanced computing products and technologies such as computing architectures, data storage, high-speed interconnect, software-hardware coordination, and computing-power coordination… and continuously improve the supply level of foundational computing technologies, key components, core parts and other elements."

Without a doubt, domestic supply of high-speed interconnect has become a key proposition of the computing power era.

Fortunately, 6 years ago, Zhongxingwei laid out its plans for this track early.

In April 2020, just as the National Big Fund increased its investment in the high-speed interconnect chip field, Zhongxingwei took up this mission. At that time, the domestic R&D foundation for high-performance interconnect chips was very weak. In Guo Erhui's words, at the start of the venture they faced "four haves-nothing":

No engineers with relevant R&D experience, not a single line of code, no mature high-performance interconnect chip R&D experience, and it was very hard to find suitable core IP.

Everything had to start from scratch, which also meant every step taken was made under their own feet.

After choosing its track, Zhongxingwei assembled within just a few yearsan R&D team of more than a thousand people, and successfully built outthe full R&D chain covering core IP, chips, hardware, software and systems。

The key links that once constrained domestic high-performance interconnect chips—such as high-speed SerDes, low-latency switching architectures, network congestion, lossless transmission and data reliability—have all become areas where the company has built complete, independently developed technology.

With this, Chinese vendors began to stand eye to eye with international giants, truly possessing full-stack R&D capability for high-performance interconnect chips.

According to test data, in a 16-drive RAID5 configuration with a 256KiB sequential write test, Zhongxingwei's RAID card delivered write bandwidth approximately 47% higher than comparable products from international majors.

The PCIe 5.0 switch chip achieved bandwidth of 55GB/s in both host-to-device and device-to-host transmission tests, on par with comparable products from international majors.

In addition, based on three new products—the PCIe 6.0 Switch, the 800G multi-protocol AI NIC and the multi-mode RAID chip—Zhongxingwei successfully completed a full lineup expansion spanning high-speed compute interconnect, AI cluster networking and enterprise-class storage.

The PCIe 6.0 Switch supports up to 144 lanes, double the bandwidth of the previous generation, offers 100-nanosecond-level latency, and supports CXL memory expansion and pooling;

the 800G multi-protocol AI NIC supports 800G line-rate forwarding with microsecond-level latency, providing large-scale AI clusters with high-performance, high-speed communication;

the multi-mode RAID chip supports three connection modes—SAS, SATA and PCIe 5.0—and has a built-in hardware encryption engine, balancing storage throughput performance with data security.

At the launch event, Guo Erhui proudly announced, "Zhongxingwei has brought 12 chips into mass production, with cumulative shipments exceeding 800,000 units, and its product portfolio now covers both general-purpose computing and intelligent computing scenarios."

This higher-level, large-scale product supply capability has finally freed domestic computing players from the supply-cut-off crisis in high-performance interconnect chips.

Leading vendors begin to band together and cast their votes

Facing Broadcom, which has long dominated the global interconnect chip track, how did this newly risen domestic vendor so quickly win the trust of the mainstream market?

The answer is simple:not taking the easy way out, and putting in painstaking effort。

In computing systems engineering, interconnect chips face highly complex demand scenarios. In particular, data transmission needs at different levels place markedly different requirements on the underlying chips, and long-term stability and reliability validation is required.

Many companies can often only start with the relatively low-barrier links, to quickly achieve market entry and commercial monetization. As a result, domestic interconnect chips have severely lacked systematic and platform-level capabilities.

From its very beginning, Zhongxingwei chose the long-term path. It did not chase short-term profit statements or fixate on involution-style competition in niche markets, but instead advanced step by step, conquering interconnect technologies for every scenario of general-purpose and intelligent computing one by one.

Looking back, this meant lying low for a full 6 years, and it also made this debut performance deliver a highly substantive report card.

Of course, what truly made internet giants and server makers band together and vote for it was the painstaking effort devoted to supply chain quality assurance.

As is well known, interconnect chips, as the core backbone connecting storage, computing and networking, largely determine a computing system's ability to run stably over the long term. In finance, for example, users demand extremely strict data security and system stability—

whether a product can run stably over the long term, adapt to complex software and hardware environments, and have problems quickly located and resolved when they arise—these are all mandatory questions for interconnect chip vendors.

Faced with this exam, Zhongxingwei did not rush to sell its products; instead, before delivery it established a full-process quality management system spanning R&D, design, validation and mass production.

For example, in the RAID card product area, Zhongxingwei's R&D team once used 500 servers and 1,000 boards to conduct a cumulative 600,000 hours of real-machine testing, repeatedly verifying product reliability through high-intensity stress tests.

This sincere attitude of solving problems before delivery squarely hit those leading enterprises' core demand for product stability. To date, Zhongxingwei's chip products have a customer return rate below 100 DPPM, and its board products a customer return rate below 500 DPPM.

It is reported that Zhongxingwei's products have fully entered the products and solutions of companies such asInspur, Lenovo, New H3C and ZTE, achieving large-scale deployment in fields including the internet, finance, telecom operators and electric power.

Among these, telecom operator customers have already deployed Zhongxingwei storage cardsOver 100,000 pieces, stable operationmore than 18 months。

At this launch event, industry partners including Kylin, UnionTech, Tencent Cloud, Inspur, New H3C, ZTE, and Lenovo announced further strategic cooperation with Zhongxingwei. The next step is for software and hardware vendors to work together to advance the deployment of domestic high-performance interconnect solutions.

To shake what is great and break what is strong requires sustained effort over a long time.

From full-stack layout to mass production achievements and cumulative shipments, this chip company that takes "hard work" to the extreme has drawn enormous market attention right as it emerges. This may be the era's delayed reward for its strategic resolve.

*This article is republished by QbitAI with authorization; the views expressed are solely those of the original author.

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